Research > Projects

Current

Cerbero logo(EU – H2020)

2017-19

Description:
The CERBERO EU project aims at developing a design environment for Cyber-Physical Systems based on two pillars:

  1. A cross-layer model-based approach to describe, optimize, and analyze the system and all its different views concurrently, and
  2. An advanced adaptivity support based on a multi­layer autonomous engine.

The targeted three applications of CERBERO are a self­-healing system for planetary exploration, unmanned vehicles for ocean monitoring and a smart travel network for electric vehicles.

Partners:
IBM (leader), UniSS, Thales Alenia Space, UniCA, INSA Rennes, UPM, Università della Svizzera Italiana, Abinsula, Ambiesense, TNO, S&T, and Centro Ricerche Fiat
Mordred logo(Fr – GdR ISIS)

2017-18

Description:
The objective of the Mordred young researcher project is to create a set of methods and tools to ease the design and implementation of applications for massively parallel architecture. The project has two main research axes:

  1. The design of a reconfigurable stereo-matching algorithm. This implementation based on dataflow models of computations will be specifically design to offer high performance on massively parallel architectures, by exploiting temporal redundancy of analyzed stereo-video streams.
  2. The porting of the Spider runtime on the Kalray MPPA256 massively architecture. The Spider runtime is a dataflow aware RTOS specifically designed to manage the execution of reconfigurable PiSDF graphs onto embedded Multiprocessor Systems-on-Chips.
Partners:
IETR (leader), Lab-STICC
COMPACT-SL-MODELS
(US – NSF)
2015-19
Description:
This project will develop new techniques to help advanced computing systems for signal processing better adapt to the environments in which they operate.
Partners:
UMD (leader), National Chung Tiao University, INSA, Georgia Tech.
Artefact logo(Fr/CH – ANR/FNSNF)

2016-18

Description:
The ARTEFaCT project aims to ease the design of energy efficient circuits by using approximate computing techniques. The project will contribute along three main research directions:

  1. Approximate, ultra low-power circuit design,
  2. Modeling and analysis of variable levels of computation precision in applications
  3. Accuracy-energy trade-offs in software.
Partners:
CEA Leti (leader), EPFL, INRIA, INSA

Past

compa logo(FR – ANR)

2011-14

Description:
The goal of the COMPA project is to propose generic models for adaptive multi-processors embedded systems. The project proposes:

  • To target independent description of the application, with a focus on dataflow Model of Computations (MoC).
  • To offer additional opportunities for optimizing the application implementation, by developing a static analysis toolbox for detecting underlying MoCs used in a given CAL description.
  • To specify and develop a “Runtime Execution Engine” which will be in charge of the execution of the dataflow network on the platform.

All these contributions have been integrated in an open source software suite and a set of “runtime manager” software components have been developed for a multi-core FPGA based hardware demonstrator.

Partners:
INSA (leader), Texas Instruments France, Lab-STICC, IRISA, CAPS Entreprise, Modae